> Also, we've been told DDR5 had built-in dual channel on a single stick so I was not sure this would make any difference at all.
It's really necessary to start thinking in terms of the total width of the memory bus. DIMMs have a 64-bit wide connection. Dual-channel used to only mean half of your DIMM slots were on channel A and half of them were on channel B, for a total of a 128-bit wide memory bus if you populated both channels.
DDR5 splits the DIMM's 64-bit connection into two sub-channels of 32 bits each. But mainstream CPUs still have the same 128-bit total width for their DRAM controllers, so you still need more than one DIMM installed to use all the (sub)channels provided by the CPU's memory controller.
Comparing the 128-bit wide memory bus against the bus widths used by discrete GPUs (and comparing the memory clock speeds) makes it much less surprising that running integrated graphics in a crippled 64-bit wide memory configuration would be problematic. Graphics is a very bandwidth-hungry task.
https://greatpcreview.com/guides/cas-latency-vs-ram-speed/
If you learn about latency and RAM timings, and also how the processor/CPU interacts with memory via the controllers and kernel then you get a much deeper and valuable understanding.
Most people confuse “correct configuration” with “more powaaa!”
By analogy: you have now tuned your car and it is running properly. It’s not that it has “more horsepowaaaa!” But rather it can utilize the power it does have effectively.
It's really necessary to start thinking in terms of the total width of the memory bus. DIMMs have a 64-bit wide connection. Dual-channel used to only mean half of your DIMM slots were on channel A and half of them were on channel B, for a total of a 128-bit wide memory bus if you populated both channels.
DDR5 splits the DIMM's 64-bit connection into two sub-channels of 32 bits each. But mainstream CPUs still have the same 128-bit total width for their DRAM controllers, so you still need more than one DIMM installed to use all the (sub)channels provided by the CPU's memory controller.
Comparing the 128-bit wide memory bus against the bus widths used by discrete GPUs (and comparing the memory clock speeds) makes it much less surprising that running integrated graphics in a crippled 64-bit wide memory configuration would be problematic. Graphics is a very bandwidth-hungry task.